1. Keep Traces as Short and Direct as Possible

One of the most fundamental PCB routing practices is to keep traces short and direct. This minimizes inductance, capacitance, interference, and signal integrity issues. Avoid meandering traces or routing at odd angles.

Route high-speed signals first using the most direct path. Then route lower priority traces around them as needed. Be sure to avoid 90 degree angles which can cause signal reflections. Use 45 degree angles or rounded corners instead.

2. Match Trace Lengths for Differential Pairs

When routing differential pairs, it’s important the two traces are equal length to ensure signals arrive at the same time. Any mismatch in length can cause skew between the positive and negative signals.

The actual allowable length mismatch depends on the rise time of the signals:

Rise Time	Maximum Allowable Length Mismatch
< 1 ns	2.5 mm
1-2 ns	12.5 mm
> 2 ns	25 mm

If needed, add intentional meanders to the shorter trace to equalize lengths. Keep the meanders close together and away from other signals to minimize crosstalk.

3. Provide Adequate Clearance Between Traces

Another important PCB routing practice is to provide enough clearance between traces to prevent unintended coupling or shorting. The higher the voltage or faster the rise time, the more clearance required.

Typical clearance guidelines based on voltage are:

Voltage	Minimum Clearance
< 50V	0.1 mm
50-150V	0.6 mm
150-300V	1.5 mm
> 300V	3.0 mm

For high-speed signals, provide at least 3x the trace width of clearance to adjacent traces. Even more space may be needed for very fast rise times to minimize crosstalk.

4. Size Traces Appropriately for Current

PCB traces must be wide enough to carry the required current without excessive heating. Determine the appropriate trace width based on:

• Amount of copper on the PCB (1 oz/ft² or 2 oz/ft²)
• Maximum allowable temperature rise
• Trace thickness
• Current being carried

Online PCB trace width calculators make sizing straightforward. As a rule of thumb, provide at least 0.010″ of width per amp of current for 1 oz copper. Use wider traces for higher currents, thicker boards, and less temperature rise.

5. Avoid Splitting Ground or Power Planes

Ground and power planes provide a low-impedance return path for signals. Avoid splitting these planes with traces or slots as it forces return currents to take a longer, higher impedance path. This can cause ground loops, EMI, and signal integrity problems.

If you must route traces across a plane, use a small number of stitching vias to tie the two sides together. Place ground vias near connectors or any place signals transition between layers.

6. Minimize Vias and Layer Changes

While vias are essential in multi-layer PCBs, they do add inductance and capacitance to a trace. Changing layers also complicates the return path. Therefore, another good PCB routing practice is to minimize the number of vias and layer changes.

Route critical signals on a single layer if possible. If a via is needed, use the largest diameter and shortest length appropriate for the design. Blind and buried vias provide a more direct path than through-hole vias.

7. Provide Solid Ground Around High-Speed Traces

High-speed signals need a solid reference plane beneath them for impedance control and to minimize radiation. The return current follows the path of least inductance, which is directly under the trace.

Remove copper pours and traces under high-speed signals so they reference a solid ground plane. Otherwise, the return current has to meander around obstacles which increases inductance and causes EMI.

8. Terminate Transmission Lines Properly

A transmission line is any trace whose length is greater than 1/6 the electrical length of the rising/falling edge. Proper termination is required at the source and/or load to prevent reflections.

The termination method depends on the type of driver, signal speed, and allowed over/undershoot:

Termination	Driver	Signal Speed	Overshoot
Series	Current	Slow	0-50%
Parallel	Voltage	Medium	50-100%
AC	Current	Fast	0-5%
Differential	Diff pair	Very fast	0-50%

Simulate transmission lines to verify the termination is adequate before committing to hardware. Include models for trace impedance, driver characteristics, and component parasitics.

9. Follow Datasheet Layout Recommendations

Most IC manufacturers provide detailed layout guidelines for their parts. This is especially important for sensitive analog circuits and high pin-count devices like FPGAs.

Recommendations typically include:

• Proper power supply decoupling
• Specific pin connections
• Trace impedance requirements
• Placement of bypass capacitors
• Keepout and creepage/clearance distances

Following the datasheet guidelines improves performance, eases debugging, and reduces the chance of damaging the device. Consult the datasheet early in the design process while component placement is still flexible.

10. Design for Manufacturing

The final PCB routing practice is to design with manufacturing in mind. Traces and spaces that are too small increase cost and lower yields.

General DFM guidelines for PCB traces are:

• Minimum trace width of 0.006″ (0.15mm)
• Minimum trace spacing of 0.008″ (0.20mm)
• Minimum drill size of 0.20mm
• Minimum annular ring of 0.15mm

Smaller geometries are possible with advanced PCB fabrication but increase cost. Consult with your manufacturer early in the design process to understand their specific capabilities and adjust your trace widths and clearances as needed.

Frequently Asked Questions

What is the 3W rule for PCB traces?

The 3W rule states that the clearance between traces should be at least 3 times the width of the trace itself. This minimizes crosstalk and interference between signals. The higher the frequency or faster the rise time, the more clearance required.

How do you calculate PCB trace impedance?

PCB trace impedance depends on the trace width, height above the reference plane, and board dielectric properties. It can be calculated using the following formulas:

For a microstrip trace (on the outer layer):
Z₀ = 87/√(ℇᵣ + 1.41) * ln(5.98h/(0.8w + t))

For a stripline trace (embedded between layers):
Z₀ = 60/√ℇᵣ * ln(1.9(2h)/(0.8*w + t))

Where:
– Z₀ = characteristic impedance in ohms
– ℇᵣ = dielectric constant of the PCB material
– h = height of the trace above the reference plane in mm
– w = width of the trace in mm
– t = thickness of the trace in mm

Online calculators and modeling tools make impedance calculations straightforward based on your stackup parameters. The typical impedance for high-speed PCB traces is 50 ohms for single-ended and 100 ohms for differential pairs.

What is the difference between interactive and automatic PCB routing?

Interactive routing is a manual process where the designer specifies the path for each trace individually. This provides complete control but is time-consuming for large designs.

Automatic routing uses algorithms to route traces based on designer constraints like trace width, clearance, via types, etc. The autorouter can complete the routing much faster than manual efforts.

However, autorouting may not always give the most optimized results, especially for dense or high-speed designs. A combination of interactive and automatic routing is often used – manual placement and routing of critical traces followed by autorouting of less critical ones.

How do you determine the right trace width for power traces on a PCB?

The minimum trace width for power traces depends on the current being carried, allowable temperature rise, copper thickness, and any voltage drop constraints.

As a general rule, provide 0.010″ of trace width for every amp of current for 1 oz copper. For 2 oz copper, provide 0.005″ per amp. This limits the temperature rise to about 10 °C.

More precise calculations should be used for large currents or tight voltage drop budgets. Online trace width calculators make this straightforward based on your specific PCB parameters.

What are some common PCB routing mistakes to avoid?

Some common PCB routing mistakes include:

1. Routing traces too close together, causing excessive crosstalk
2. Not providing a solid ground reference for high-speed signals
3. Splitting ground or power planes with traces or slots
4. Using too many vias or unnecessarily changing layers
5. Not length-matching differential pairs
6. Not considering manufacturing tolerances or capabilities
7. Forgetting to terminate transmission lines
8. Not following datasheet layout recommendations
9. Routing traces under noisy components like switching regulators
10. Not simulating sensitive signals before committing to hardware

By following the best practices outlined in this article and carefully reviewing the design before fabrication, these common mistakes can be avoided. Taking the time to optimize the PCB layout pays dividends in improved performance, reduced EMI, and easier manufacturing.