The ceramic PCB manufacturing process converts a raw alumina, aluminum nitride, or silicon nitride substrate into a finished circuit board through a sequence of substrate preparation, metallization, patterning, firing, plating, and electrical test. The exact steps depend on the metallization method chosen—DPC, DBC, AMB, thick film, or thin film—but the overall flow follows the same logic: start with verified design data, build conductors onto a ceramic blank, then inspect every board before it ships.
This article walks through each stage in order, compares the major process variants, and includes a worked cost breakdown so you can estimate pricing before requesting a formal quote.
Key Takeaways
- Ceramic PCB manufacturing uses five main metallization methods—DPC, DBC, AMB, thick film, and thin film—each with different trace resolution, copper thickness, and thermal performance trade-offs.
- Substrate material selection (96% Al₂O₃, 99.6% Al₂O₃, AlN, Si₃N₄) happens before any metallization step and determines firing temperature, thermal conductivity, and cost.
- Minimum trace/space ranges from roughly 20 µm (thin film) to 150 µm (DBC), so the metallization method must match your circuit density.
- Cycle time from Gerber receipt to shipped prototype is typically 5–15 business days for most ceramic processes, compared to 1–5 days for standard FR-4.
- Electrical test (continuity, isolation, hi-pot) and dimensional inspection are performed on 100% of ceramic boards, not sampled, because per-unit cost justifies it.
Step 1 — Design Data Preparation (Gerber to Tooling)
Every ceramic PCB starts as a Gerber RS-274X or ODB++ file set. The manufacturer’s CAM engineer imports the data, runs DRC (design rule checks) against the chosen process’s limits, and generates tooling files: photo masks for DPC or thin film, screen meshes for thick film, or etching patterns for DBC/AMB.
Common DRC catches at this stage include trace widths below the process minimum, pad-to-edge clearances that risk chipping during singulation, and via sizes incompatible with the substrate thickness. If you are designing for ceramic for the first time, review ceramic PCB spec limits and capabilities before finalizing your layout. Fixing a clearance violation in Gerber costs nothing; fixing it after metallization costs an entire panel.
Step 2 — Substrate Selection and Incoming Inspection
The substrate is the foundation. It arrives as a fired, polished blank—sometimes called an “as-fired” or “lapped” substrate depending on surface finish requirements. Material choice is driven by thermal conductivity, dielectric strength, CTE match to the die or component, and cost.
| Material | Thermal Conductivity (W/m·K) | CTE (ppm/°C) | Dielectric Strength (kV/mm) | Relative Cost | Source |
|---|---|---|---|---|---|
| Al₂O₃ 96% | 24–28 @ 25 °C | 7.1–7.4 | 10–15 | 1× | CoorsTek ADS-96R datasheet |
| Al₂O₃ 99.6% | 28–35 @ 25 °C | 7.6–8.0 | 14–17 | 1.5–2× | Kyocera A-493 datasheet |
| AlN | 170–200 @ 25 °C | 4.4–4.7 | 14–17 | 3–5× | Maruwa HA-200 datasheet |
| Si₃N₄ | 70–90 @ 25 °C | 2.5–3.3 | 14–17 | 5–8× | Kyocera SN-282 datasheet |
Typical values for commercially available material, for comparison only. Confirm against the datasheet for your specific grade.
Incoming inspection checks thickness tolerance (typically ±0.025 mm for lapped substrates per ASTM C1161), surface roughness (Ra < 0.4 µm for DPC, Ra < 0.8 µm for thick film), camber, and visual defects. Substrates failing inspection are rejected before any value is added. For a deeper comparison of these ceramics, see ceramic PCB materials compared.
Step 3 — Via and Through-Hole Formation
Ceramic cannot be drilled with standard carbide bits the way FR-4 can. Vias are formed by one of three methods depending on the process family:
- Laser drilling (DPC, thin film): A CO₂ or UV laser ablates through the fired substrate. Achievable diameters range from 50 µm to 300 µm. Taper is unavoidable and must be accounted for in the design.
- Punching (LTCC, HTCC): Vias are punched in the green (unfired) tape before lamination. Minimum diameters around 75–100 µm are standard.
- No vias (single-layer DBC/AMB): Most DBC and AMB boards are single-layer, so vias are not applicable. Multi-layer DBC assemblies use stacked boards with wire bonds or edge connections.
After drilling, vias are filled with conductive paste (Ag, AgPd, or Cu) and co-fired or sintered. Via fill quality is verified by X-ray or cross-section on sample coupons.
Step 4 — Metallization: The Step That Defines the Process
Metallization is where the five major ceramic PCB processes diverge. Each deposits copper (or another conductor) onto the substrate in a fundamentally different way. The choice of metallization locks in your trace resolution, copper thickness, thermal resistance, and cost.
DPC (Direct Plated Copper)
A thin seed layer of Ti/Cu or Cr/Cu is sputtered onto the substrate in a vacuum chamber. Photoresist is applied, exposed through a mask, and developed. Copper is then electroplated onto the exposed seed layer to the target thickness (typically 1–70 µm). After stripping the resist, the seed layer is etched away, leaving the pattern. DPC achieves the finest lines among copper-based processes—down to about 30–50 µm trace/space—and is the go-to for high-density ceramic circuits. Learn more about ceramic PCB fabrication methods including DPC, DBC, and thick film.
DBC (Direct Bonded Copper)
A copper foil (typically 127–500 µm thick) is bonded directly to the ceramic at roughly 1065 °C in a controlled oxygen atmosphere. The copper surface forms a thin CuO eutectic layer that wets and bonds to the Al₂O₃ or AlN substrate. After bonding, the foil is patterned by photolithography and etching, similar to standard PCB processing. DBC excels in high-current power electronics but is limited to about 150 µm minimum trace/space.
AMB (Active Metal Brazing)
Similar in result to DBC but uses a Ti-containing braze alloy (commonly Ag-Cu-Ti) to bond copper foil to the substrate at 800–900 °C in vacuum. AMB works on Si₃N₄ and AlN where DBC’s oxide bonding mechanism is less effective. Copper thicknesses up to 800 µm are achievable. For Si₃N₄ power substrates, see Si₃N₄ ceramic PCB production.
Thick Film
A conductive paste (typically Ag, AgPd, or Au) is screen-printed through a stainless steel mesh onto the substrate, then fired at 850–950 °C. Layer thickness is 8–15 µm per print. Minimum trace/space is around 100–125 µm. Thick film is the most mature ceramic PCB process and the most cost-effective for moderate circuit density. It also supports printed resistors and dielectric layers for multi-layer builds.
Thin Film
Conductors (typically NiCr, TaN, or Au) are deposited by sputtering or evaporation, then patterned by photolithography and wet or dry etching. Trace/space below 20 µm is achievable. Thin film is used for RF/microwave circuits, precision resistor networks, and MEMS packaging where line definition must be extremely tight.
Step 5 — Patterning and Etching
For DPC, DBC, AMB, and thin film, patterning follows conventional photolithographic steps: apply photoresist, expose through the mask (contact or projection), develop, etch, strip resist. The etch chemistry depends on the metal—ammoniacal etchant for copper, aqua regia for gold, FeCl₃ for thick copper. Etch factor (undercut relative to depth) becomes critical on DBC boards with 300 µm copper; a typical etch factor of 1:1 means a 300 µm copper layer undercuts 300 µm per side, limiting practical minimum trace width to about 600 µm on the thickest foils.
For thick film, patterning is inherent in the screen-printing step—no separate etch is needed. This is one reason thick film tooling costs are lower.
Step 6 — Firing and Sintering
Thick film pastes require a post-print firing cycle in a belt furnace at 850–950 °C with a controlled atmosphere profile (typically air for Ag and AgPd, nitrogen for Cu paste). Peak temperature, dwell time, and ramp rate are specified by the paste manufacturer (e.g., DuPont, Heraeus). Incorrect profiles cause adhesion failure, blistering, or resistor drift.
DBC bonding and AMB brazing are also high-temperature steps, but they occur during metallization (Step 4) rather than as a separate post-process. DPC and thin film processes do not require a high-temperature firing step after deposition, which is an advantage when using temperature-sensitive substrates or when co-processing with pre-attached components.
Step 7 — Surface Finish
After metallization and patterning, exposed copper pads receive a surface finish to prevent oxidation and ensure solderability. Common finishes for ceramic PCBs include:
- ENIG (Electroless Nickel / Immersion Gold): 3–6 µm Ni, 0.05–0.15 µm Au. Good solderability, flat surface for fine-pitch. Per IPC-4552.
- ENEPIG (Electroless Nickel / Electroless Palladium / Immersion Gold): Adds a 0.05–0.15 µm Pd barrier. Better wire-bondability than ENIG.
- Electrolytic Ni/Au: 2–5 µm Ni, 0.5–2.5 µm Au. Required for heavy-wire Al wedge bonding.
- OSP (Organic Solderability Preservative): Rarely used on ceramic; limited shelf life and not compatible with wire bonding.
The finish you choose affects downstream assembly. If your board will go through a ceramic-specific reflow soldering profile, confirm that the finish can withstand the peak temperature and time above liquidus without dewetting.
Step 8 — Singulation (Panelization to Individual Boards)
Ceramic panels are singulated into individual boards by laser cutting, diamond scribing and breaking, or diamond-blade dicing. Each method has trade-offs:
| Method | Edge Quality | Kerf Width | Speed | Best For |
|---|---|---|---|---|
| Laser (CO₂ / UV) | Smooth, minimal chipping | 50–100 µm | Moderate | Complex outlines, tight tolerances |
| Scribe & break | Rougher edge, some chipping | ~0 (score line) | Fast | Rectangular boards, high volume |
| Diamond dicing | Very smooth | 150–300 µm | Slow | Thick substrates, precision edges |
Values are representative; actual results depend on substrate material, thickness, and equipment. Confirm with your manufacturer.
Singulation generates ceramic dust. Proper extraction and filtration are essential for both equipment longevity and operator safety. Panel utilization—how many boards fit per panel—directly affects unit cost. For standard ceramic PCB panel sizes and working areas, check your layout against common formats (114.3 × 114.3 mm, 139.7 × 190.5 mm) early in the design phase.
Step 9 — Cleaning, Inspection, and Electrical Test
After singulation, boards are ultrasonically cleaned to remove cutting debris and flux residues. Inspection and test follow a 100% protocol:
- Visual / AOI: Automated optical inspection checks for trace defects, opens, shorts, and contamination.
- Dimensional: X-Y measurements on a coordinate measuring machine verify pad locations, board outline, and via positions against the Gerber data. Typical positional tolerance is ±25–50 µm for DPC.
- Electrical: Continuity and isolation testing (flying probe or bed-of-nails) confirms every net. Hi-pot testing at 2–5× the rated working voltage per IPC-9252 checks dielectric integrity.
- Cosmetic: Final visual inspection under magnification for edge chips, scratches, and surface anomalies.
Boards that fail any test are scrapped, not reworked in most cases. Ceramic rework is possible for some defect types—pad lift, solder bridge—but the economics rarely justify it on production boards. See ceramic PCB rework and repair for the scenarios where it does make sense.
Step 10 — Packaging and Shipping
Ceramic boards are brittle. Packaging must prevent mechanical shock, static discharge, and moisture absorption. Boards are placed in ESD-safe waffle trays or gel packs, separated by interleaving paper, and packed in vacuum-sealed moisture barrier bags with desiccant per IPC/JEDEC J-STD-033. Proper ESD packaging and shipping for ceramic boards prevents the kind of edge chipping and pad damage that turns a good board into scrap during transit.
Worked Example: Cost Breakdown for a Thick-Film Alumina Board
Suppose you need 200 pieces of a 25 × 25 mm, single-layer thick-film circuit on 96% Al₂O₃, 0.635 mm thick, with ENIG finish. Here is a representative cost structure:
| Cost Element | Per-Board Estimate (USD) | % of Total |
|---|---|---|
| Substrate blank (96% Al₂O₃) | $1.20 | 24% |
| Screen & tooling (amortized over 200 pcs) | $0.75 | 15% |
| Thick-film print + fire (Ag paste) | $1.50 | 30% |
| ENIG surface finish | $0.50 | 10% |
| Laser singulation | $0.35 | 7% |
| Test & inspection | $0.40 | 8% |
| Packaging | $0.30 | 6% |
| Total | $5.00 | 100% |
These figures are illustrative and will vary with material grade, paste type, panel utilization, and order quantity. Request a project-specific quote for accurate pricing.
At 1,000 pieces, tooling amortization drops and the per-board cost might fall to $3.50–$4.00. At 50 pieces, expect $8–$12 each. The substrate and metallization paste together account for over half the cost in every scenario, which is why material selection is the single biggest cost lever.
Enter your board dimensions, quantity, and material to get a ballpark cost estimate instantly:
[pcb_calc type=”pcb-quote”]
Process Comparison: DPC vs. DBC vs. Thick Film vs. Thin Film vs. AMB
| Parameter | DPC | DBC | AMB | Thick Film | Thin Film |
|---|---|---|---|---|---|
| Conductor | Cu | Cu | Cu | Ag, AgPd, Au | Au, NiCr, TaN |
| Conductor thickness | 1–70 µm | 127–500 µm | 127–800 µm | 8–15 µm/layer | 0.1–5 µm |
| Min trace/space | 30–50 µm | 150–300 µm | 200–400 µm | 100–125 µm | 10–25 µm |
| Compatible substrates | Al₂O₃, AlN | Al₂O₃, AlN | Si₃N₄, AlN, Al₂O₃ | Al₂O₃, AlN | Al₂O₃, AlN, quartz |
| Peak process temp | ~200 °C (sputter) | ~1065 °C | 800–900 °C | 850–950 °C | ~200 °C (sputter) |
| Typical application | LED, sensor, RF | Power modules | EV power modules | Hybrid circuits | RF, precision resistors |
| Relative cost (same board size) | Medium | Medium-high | High | Low-medium | High |
Values are representative ranges across multiple manufacturers. Confirm against your supplier’s specific capabilities.
When NOT to Use Ceramic PCB Manufacturing
Ceramic is not the right substrate for every project. Choose FR-4 or metal-core PCB (MCPCB) instead when:
- Your board is larger than about 150 × 200 mm. Ceramic substrates are limited in panel size, and large boards are fragile and expensive. FR-4 handles large formats easily.
- You need many layers (>4) with complex routing. Multi-layer ceramic (LTCC, HTCC) exists but is far more expensive per layer than FR-4 multi-layer. If you need 8+ layers with blind/buried vias, FR-4 or flex is almost always more practical.
- Your operating temperature stays below 130 °C and power density is moderate. Standard FR-4 (Tg 170 °C) or high-Tg FR-4 handles most commercial electronics. An aluminum MCPCB at 1–2 W/m·K may be enough for LED boards that do not need ceramic’s 24–200 W/m·K range.
- Cost is the primary constraint and volumes are high. At 10,000+ units, the per-board cost gap between ceramic and FR-4 can be 10–50×. Unless thermal, frequency, or reliability requirements force ceramic, the economics will not work.
- Mechanical shock and vibration are extreme. Ceramic is brittle. A 0.635 mm alumina substrate will crack under impacts that a 1.6 mm FR-4 board survives. If your product is dropped regularly (consumer handhelds, field instruments), ceramic needs careful mechanical design or a protective housing.
Frequently Asked Questions
How long does ceramic PCB manufacturing take from order to delivery?
Prototype orders typically ship in 5–15 business days after design confirmation, depending on the process (DPC is faster; DBC and AMB require longer furnace cycles). Production runs of 500+ pieces usually take 3–5 weeks. For fast-turn needs, explore ceramic PCB fast-turn prototyping options.
Can I use standard PCB design software for ceramic boards?
Yes. Altium Designer, KiCad, Cadence Allegro, and other tools all output Gerber RS-274X and ODB++ files that ceramic manufacturers accept. Set your design rules to match the ceramic process minimums (trace, space, via, clearance) rather than the FR-4 defaults your tool ships with.
Is ceramic PCB manufacturing compatible with lead-free solder?
Yes. Ceramic substrates tolerate the higher peak reflow temperatures of SAC305 (roughly 245–260 °C peak) without degradation. The substrate itself is stable well above 300 °C. The limiting factor is usually the surface finish or paste, not the ceramic.
What file formats does a ceramic PCB manufacturer need?
At minimum: Gerber RS-274X (copper, solder mask if applicable, silkscreen, drill, outline layers), a drill file (Excellon), and a fabrication drawing with dimensions, tolerances, material callout, surface finish, and copper thickness. ODB++ or IPC-2581 packages are also accepted by most manufacturers and reduce ambiguity.
Do ceramic PCBs need solder mask?
Not always. Many ceramic boards, especially DBC power substrates, ship without solder mask because the ceramic itself is an excellent insulator. When solder mask is needed (e.g., fine-pitch SMD pads), it is typically a screen-printed glass or polymer layer fired at 500–600 °C, not the UV-curable epoxy used on FR-4.
How do I evaluate a ceramic PCB manufacturer?
Request process capability data (Cpk for trace width, positional accuracy), ask for cross-section photos of vias and bond interfaces, verify certifications, and run a small prototype lot before committing to production. A detailed checklist is available at selecting a ceramic PCB manufacturer: 9 checks.
Next Step
If you have a board design in hand, upload your Gerber files for an instant quote. If you are still choosing between ceramic processes or materials, the ceramic fabrication capabilities overview can help narrow the field. Either way, getting a quote costs nothing and takes under a minute.